Table 1 Xilinx IEEE-754 single-precision floating-point operator’s latency and slice register usage
Floating-point operator | Low-latency | Slice registers | Max-latency | Slice registers |
|---|---|---|---|---|
fadd | 3 | 139 | 12 | 547 |
fmul | 3 | 87 | 8 | 361 |
fdiv | 11 | 499 | 28 | 1377 |
fcomp | 1 | 2 | 2 | 8 |
Floating-point operator | Low-latency | Slice registers | Max-latency | Slice registers |
|---|---|---|---|---|
fadd | 3 | 139 | 12 | 547 |
fmul | 3 | 87 | 8 | 361 |
fdiv | 11 | 499 | 28 | 1377 |
fcomp | 1 | 2 | 2 | 8 |