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Table 3 Performance results of our design

From: Extending the BEAGLE library to a multi-FPGA platform

nsites

CPU(us)

GPU(us)

FPGA(us)

Memory efficiency (%)

Speedup FPGA vs. CPU

Speedup FPGA vs. GPU

128

27

93

96

2

0.28

0.97

256

41

93

101

4

0.41

0.92

512

69

94

103

7

0.67

0.91

1024

133

99

106

13

1.25

0.93

2048

225

107

107

20

2.10

1.00

4096

462

130

115

30

4.02

1.13

8192

944

167

125

28

7.55

1.34

16384

1894

240

148

28

12.80

1.62

32768

3873

385

207

28

18.71

1.86

65536

7922

672

304

29

26.06

2.21

131072

15898

1247

415

38

38.31

3.00

262144

31774

n/a

764

40

41.59

n/a

524288

63696

n/a

1240

44

51.37

n/a

1048576

127957

n/a

2280

46

56.12

n/a

8192000

1028649

n/a

15750

49

65.31

n/a